Product Summary
The BS62LV1027SIP55 is a high performance, very low power CMOS Static Random Access Memory organized as 131,072 words by 8 bitsand operates from a wide range of 2.4V to 5.5V supply voltage.Advanced CMOS technology and circuit techniques provide both highspeed and low power features with a typical CMOS standby current of0.1uA at 3V/25℃ and maximum access time of 55ns at 3V/85℃. Easy memory expansion is provided by an active LOW chipenable (CE1), an active HIGH chip enable (CE2), and active LOWoutput enable (OE) and three-state output drivers.The BS62LV1027SIP55 has an automatic power down feature, reducing thepower consumption significantly when chip is deselected. The BS62LV1027SIP55 is available in DICE form , JEDEC standard 32 pin450mil Plastic SOP, 300mil Plastic SOJ, 600mil Plastic DIP,8mm x13.4mm STSOP and 8mmx20mm TSOP.
Parametrics
BS62LV1027SIP55 absolute maximum ratings: (1)Terminal Voltage withRespect to GND: -0.5 to Vcc+0.5V; (2)Temperature Under Bias: -40 to +85℃; (3)Storage Temperature: -60 to +150℃; (4)Power Dissipation: 1.0W; (5)DC Output Current: 20mA.
Features
BS62LV1027SIP55 features: (1)Wide Vcc operation voltage: 2.4V ~ 5.5V; (2)Very low power consumption; (3)High speed access time; (4)Automatic power down when chip is deselected; (5)Easy expansion with CE2, CE1, and OE options; (6)Three state outputs and TTL compatible; (7)Fully static operation; (8)Data retention supply voltage as low as 1.5V.
Diagrams
BS62LV1023DC |
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BS62LV1023DI |
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BS62LV1023JC |
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BS62LV1023JI |
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BS62LV1023PC |
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BS62LV1023PI |
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